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NvidiaPatent applicationChips & hardwareInterest 6/10

Nvidia patents method to speed up math by skipping empty data blocks

Nvidia describes a way to handle large tables of numbers, called sparse matrices, by breaking them into smaller blocks. The system ignores blocks that contain only zeros and only processes the blocks with actual data, using specific labels to keep the numbers aligned. This allows the computer to perform calculations faster and with less energy.

Why it mattersThis technique could make computer chips more efficient at running complex math, which is often needed for tasks like training artificial intelligence models.

In the filing’s own words

Approaches in accordance with various embodiments provide for the processing of sparse matrices for mathematical and programmatic operations. In particular, various embodiments utilize a tiling approach that divides a sparse matrix into submatrices, many of which will include only zero-value entities. These empty tiles can be ignored, and only the tiles with non-zero entries processed, which reduces resource and time requirements for the processing. An indexing approach can be used for each entity that is a combination of the tile identifier and an offset value, which enables the values to be multiplied correctly against, for example, values of a dense matrix. The tiles can be processed in parallel and the results accumulated to generate a matrix product. The matrix product can then be passed to the next step in a process or operation, such as to a next layer in a deep neural network.

What exactly they claim (claim 1)

1. One or more processors, comprising: circuitry to: perform one or more matrix operations on one or more matrix operands indicated by one or more indices, wherein the one or more indices indicate one or more locations, within a memory resource accessible to the one or more processors, of one or more separately compressed multi-element portions of the one or more matrix operands comprising one or more non-zero values.

Facts

Company
Nvidia (NVIDIA Corporation)
Official title
TILED COMPRESSED SPARSE MATRIX FORMAT
Publication number
US20260267645A1
Application number
19659539
Filed
Apr 27, 2026
Published
Sep 10, 2026
Inventors
3
Claims
1

Classified under

G06F 9/30036 Physics & computingG06F 9/3877 Physics & computingG06F 9/3885 Physics & computingG06F 17/16 Physics & computingG06N 3/0418 Physics & computing

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.