Nvidia patents virtual simulation to perfect solder paste placement on chips
Nvidia describes a computer method that uses physics-based simulations to calculate the best shape and size for solder paste on circuit boards. The software virtually expands the paste around pins while checking for collisions and spacing limits to ensure a precise fit.
In the filing’s own words
Approaches are described for optimizing solder paste overprint distribution on printed circuit boards (PCBs) using virtual representations within a physics-based simulation environment integrated with cloud-based infrastructure. Solder paste overprint representations may be initialized to correspond to pins and holes in the PCB layout. These virtual representations may expand dynamically in all directions, guided by predefined constraints such as pin boundary limits, collision handling, minimum spacing requirements, and maximum penetration depth to control overlap between neighboring regions. The simulation may iteratively evaluate interactions between expanding regions and apply directional and penetration constraints to maintain separation and prevent interference. Each representation may be assessed for target area completion based on spatial and design conditions. Optimized output data, including final overprint dimensions and positions, may be generated and stored in a cloud-based system for integration with PCB design tools and remote access for further layout refinement and manufacturing preparation.
What exactly they claim (claim 1)
1. A computer-implemented method, comprising: initializing a plurality of virtual representations of solder paste overprints, one or more virtual representations of the plurality of virtual representations corresponding to a respective solder element of a plurality of solder elements on a substrate; simulating expansion of the plurality of virtual representations in a physics-based simulation environment, wherein the expansion is guided by a set of predefined constraints related to one or more dimensions associated with the plurality of solder elements and the substrate, wherein each of the one or more virtual representations expands to a corresponding overprint area around a corresponding solder element; determining an optimized configuration of the plurality of virtual representations that satisfies the set of predefined constraints; and generating output data representing the optimized configuration of solder paste overprints.
Facts
- Company
- Nvidia (Nvidia Corporation)
- Official title
- AUTOMATED OPTIMIZATION OF SOLDER PASTE OVERPRINTS USING PHYSICS-BASED SIMULATION
- Publication number
- US20260260040A1
- Application number
- 19068903
- Filed
- Mar 3, 2025
- Published
- Sep 3, 2026
- Inventors
- 6
- Claims
- 20
Classified under
G06F 30/27 Physics & computingG06F 2111/10 Physics & computingMore from Nvidia in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.