Amazon patents compiler trick to cut down on wasted memory writes
This patent describes a method for computer compilers to reduce the amount of data written to memory. It works by analyzing code to find the largest section of memory actually needed for reading data, then cutting off any extra writing instructions that go beyond that limit.
In the filing’s own words
Techniques are disclosed for truncating memory access patterns to minimize unnecessary memory accesses. A write access pattern for an instruction from a set of memory access instructions is determined. The write access pattern indicates which of a set of memory elements of a memory region of a memory are written to during execution of the instruction. One or more read access patterns are determined that indicate which of the set of memory elements of the memory region are read from during execution of the set of memory access instructions. A most-significant dimension for the write access pattern is computed. A maximum read index of the set of memory elements that is read from by the one or more read access patterns is identified. The write access pattern is truncated along the most-significant dimension at or after the maximum read index to generate a truncated write access pattern.
What exactly they claim (claim 1)
1. A system, comprising: a host processor; and a non-transitory computer-readable medium storing a compiler configured to translate input code into compiled code to be executed on a target processor, the target processor coupled to a memory having a set of memory regions each having a set of memory elements, wherein, when the compiler is executed by the host processor, the compiler is configured to: generate a set of instructions based on the input code, the set of instructions including a set of memory access instructions each having an initial memory access pattern; for each instruction of one or more of the set of memory access instructions: determine an initial write access pattern for the instruction indicating which of the set of memory elements of a memory region are written to during execution of the instruction; determine one or more initial read access patterns indicating which of the set of memory elements of the memory region are read from during execution of the set of memory access instructions; compute a most-significant dimension for the initial write access pattern; identify a maximum read index of the set of memory elements that is read from by the one or more initial read access patterns; and truncate the initial write access pattern along the most-significant dimension for the initial write access pattern at or after the maximum read index to generate a truncated write access pattern; generate the compiled code including the one or more of the set of memory access instructions each having the truncated write access pattern.
Facts
- Company
- Amazon (Amazon Technologies, Inc.)
- Official title
- Memory access pattern truncation along most-significant dimension
- Patent number
- US12769477B1
- Application number
- 19076800
- Filed
- Mar 11, 2025
- Granted
- Oct 20, 2026
- Inventors
- 2
- Claims
- 20
Classified under
G06F 3/0655 Physics & computingG06F 3/0604 Physics & computingG06F 3/0679 Physics & computingMore from Amazon in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.