Nvidia patents method to sync video frames with high-speed displays
Nvidia describes a technique that matches the speed at which a computer creates video frames to the speed at which a screen refreshes. By keeping a small, controlled queue of instructions between the processor and the graphics chip, the system reduces the delay between sending a command and seeing the image on the screen.
In the filing’s own words
Disclosed are apparatuses, systems, and techniques that reduce latency of frame processing pipelines. The techniques include but are not limited to causing a display to set a refresh rate that matches a frame rendering rate of an application and rendering, with the frame rendering rate, a plurality of frames. Rendering frames includes generating, using a first processing unit, sets of instructions associated with respective frames and generated starting at times spaced with the refresh rate, processing, using a second processing unit, the sets of instructions to render the frames, and causing the display to display the rendered frames.
What exactly they claim (claim 1)
1. A method comprising: rendering a plurality of frames at a frame rendering rate corresponding to a video application, the frame rendering rate matching a refresh rate of a display device, wherein rendering the plurality of frames comprises: generating, using a first processing unit, a plurality of sets of instructions for a second processing unit, wherein individual sets of instructions of the plurality of sets of instructions are associated with rendering, using the second processing unit, of respective frames of the plurality of frames and are generated at times spaced with the refresh rate, wherein the first processing unit generates the plurality of sets of instructions at a rate determined to maintain a queue of unexecuted, by the second processing unit, instructions that comprises one or more sets of instructions for rendering two or fewer frames of the plurality of frames; processing, using the second processing unit, the plurality of sets of instructions to render the plurality of frames; and causing the display device to display the plurality of frames.
Facts
- Company
- Nvidia (NVIDIA Corporation)
- Official title
- Low latency synchronization of video rendering pipelines with high refresh rates
- Patent number
- US12763041B2
- Application number
- 18373748
- Filed
- Sep 27, 2023
- Granted
- Oct 13, 2026
- Inventors
- 3
- Claims
- 19
Classified under
G09G 5/395 Physics & computingG09G 2340/0435 Physics & computingMore from Nvidia in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.