OpenAI patents chip design that learns while processing data

1. A system, comprising: a processor; and a plurality of compute engines coupled with the processor, the plurality of compute engines including a compute-in-memory (CIM) hardware module, a bit mixer, and a local update module, the CIM hardware module storing a plurality of weights corresponding to a matrix and configured to perform a vector-matrix multiplication (VMM) for the matrix, the local update module being coupled with the CIM hardware module and configured to update at least a portion of the plurality of weights, wherein: the bit mixer is coupled to the CIM and configured to combine results from the CIM into a weighted output by using exponential weights and bit slicing; the CIM hardware module includes a plurality of cells for storing the plurality of weights; and the local update module includes: an adder configured to be selectively coupled with each of the plurality of cells, to receive a weight update, and to add the weight update with a weight of the plurality of weights for each of the plurality of cells; and write circuitry coupled with the adder and the plurality of cells, the write circuitry configured to write a sum of the weight and the weight update to each of the plurality of cells, and a compute engine of the plurality of compute engines includes: a controller configured to provide a plurality of control signals to the CIM hardware module and the local update module, a first portion of the plurality of control signals corresponding to an inference mode, a second portion of the plurality of control signals corresponding to a weight update mode, wherein the weight update mode includes providing the weight update to the adder.