Sony patents camera sensor design using vertical transistors
Sony has been granted a patent for a solid-state imaging element, which is the core component of digital camera sensors. The design uses specific transistors that stand vertically on the chip surface rather than lying flat, with one transistor made wider than the other to manage electrical signals. This structure helps control how light is converted into data within each pixel of the sensor.
In the filing’s own words
Provided is a solid-state imaging element including a plurality of pixels on a surface of a substrate. Each of the plurality of pixels includes a photoelectric conversion section, a first transistor having one end connected to the photoelectric conversion section, a second transistor, and a third transistor. The second transistor includes a first channel region extending in a direction substantially perpendicular to the surface of the substrate, and a first gate electrode provided on an upper surface and both side surfaces of the first channel region and connected to another end of the first transistor. The third transistor has a second channel region extending in a direction substantially perpendicular to the surface of the substrate, and a second gate electrode provided on an upper surface and both side surfaces of the second channel region.
What exactly they claim (claim 1)
1. A solid-state imaging element, comprising: a plurality of pixels on a surface of a substrate, wherein each pixel of the plurality of pixels comprises: a photoelectric conversion section configured to convert light into an electric charge; a first transistor, wherein a first end of the first transistor is connected to the photoelectric conversion section; a second transistor connected between a first power supply and a first signal line; and a third transistor connected between the second transistor and the first signal line, wherein the second transistor includes: a first channel region extending in a direction substantially perpendicular to the surface of the substrate, and a first gate electrode on an upper surface of the first channel region and both side surfaces of the first channel region, the second transistor is connected to a second end of the first transistor, the third transistor includes: a second channel region extending in the direction substantially perpendicular to the surface of the substrate, and a second gate electrode on an upper surface of the second channel region and both side surfaces of the second channel region, and the first channel region of the second transistor has a first width, the second channel region of the third transistor has a second width, the first width is between the both side surfaces of the first channel region, the second width is between the both the side surfaces of the second channel region, the second width of the second channel region of the third transistor is larger than the first width of the first channel region of the second transistor, the second transistor is an amplifier transistor, and the third transistor is a selection transistor.
Facts
- Company
- Sony (SONY GROUP CORPORATION)
- Official title
- Solid-state imaging element with Fin-type transistors
- Patent number
- US12740167B2
- Application number
- 18254021
- Filed
- Nov 17, 2021
- Granted
- Sep 15, 2026
- Inventors
- 1
- Claims
- 9
Classified under
H10F 39/80377 Electricity & electronicsH10F 39/014 Electricity & electronicsH10F 39/18 Electricity & electronicsMore from Sony in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.