Apple patents chip system that balances power and data traffic
Apple describes a chip design where different parts of the processor can request specific power levels and data speeds. A central manager combines these requests to decide how much power to give each section, ensuring the chip runs efficiently without wasting energy.
In the filing’s own words
An apparatus includes a control circuit, configured to transition a plurality of power domains into selected performance states, and a set of state request registers. A state request register may include fields that are associated with respective power domains. The apparatus may further include circuit blocks configured to store respective state request values into respective state request registers. A given state request value may indicate a requested performance state for at least one of the power domains. In addition, a performance management circuit may be configured to select, using the associated fields in the registers, a particular performance state for at least one of the power domains. The performance management circuit may be further configured to determine a transition path to sequence to the selected performance state, and to cause the control circuit to transition to the selected performance state using the transition path.
What exactly they claim (claim 1)
1. An apparatus comprising: a communication network configured to enable transactions between two or more circuits; a set of state request registers, wherein a given state request register includes fields associated with respective ones of a plurality of power domains, and wherein a given state request value indicates a given requested performance state for at least one of the plurality of power domains; a set of bandwidth request registers that are independent of the set of state request registers, wherein a given bandwidth request value indicates a requested allocation of bandwidth via the communication network; a plurality of processing circuits, including: a particular processing circuit configured to store a first state request value into a first one of the set of state request registers and to store a first bandwidth request value into a first one of the set of bandwidth request registers; and a performance management circuit configured to: retrieve state request values from the set of state request registers and bandwidth request values from the set of bandwidth request registers; adjust the first state request value based on the first bandwidth request value; and select, based on a tally of adjusted state request values, a respective performance state of one or more requested performance states for ones of the plurality of power domains.
Facts
- Company
- Apple (Apple Inc.)
- Official title
- Power Management Interface for Multiple Software Requestors
- Publication number
- US20260299660A1
- Application number
- 19707018
- Filed
- Jun 12, 2026
- Published
- Oct 1, 2026
- Inventors
- 5
- Claims
- 20
Classified under
G06F 1/26 Physics & computingMore from Apple in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.