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Apple patents image processing method to cut down on memory use

Apple has filed a patent for a way to process images on a chip by breaking them into small horizontal strips called slices. Instead of loading the whole picture into memory at once, the chip processes one slice, then moves to the next, which lowers the amount of storage needed during the work.

Why it mattersThis technique could help Apple devices handle camera or display tasks more efficiently by using less memory, which is a standard engineering improvement for chip designers.

In the filing’s own words

In some implementations, a system on a chip (SoC) includes image processing circuitry that obtains first image data corresponding to a physical environment. The image processing circuitry reads a first slice of the first image data into one or more input buffers and performs one or more image processing operations on the first slice to obtain a first portion of second image data. The image processing circuitry reads a second slice of the first image data into the one or more input buffers and performs the one or more image processing operations on the second slice to obtain a second portion of the second image data. Processing the first image data on a slice-by-slice basis enables the SoC to generate the second image data while reducing buffer storage requirements.

What exactly they claim (claim 1)

1. A system on a chip (SoC), comprising: image processing circuitry configured to: obtain first image data corresponding to a physical environment; read a first slice of the first image data into one or more input buffers; perform one or more image processing operations on the first slice of the first image data to obtain a first portion of second image data; read a second slice of the first image data into the one or more input buffers; and perform the one or more image processing operations on the second slice of the first image data to obtain a second portion of the second image data.

Facts

Company
Apple (Apple Inc.)
Official title
METHOD AND DEVICE FOR LATENCY REDUCTION OF AN IMAGE PROCESSING PIPELINE
Publication number
US20260289719A1
Application number
19691028
Filed
May 28, 2026
Published
Sep 24, 2026
Inventors
4
Claims
20

Classified under

G06T 1/20 Physics & computingG06T 5/73 Physics & computingG06T 5/90 Physics & computingG06T 7/73 Physics & computingG06T 15/005 Physics & computingG06T 15/20 Physics & computing

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.