Apple patents new circuit design for precise clock signals
Apple has filed a patent for a specific type of phase-locked loop circuitry used to generate stable clock signals in electronic devices. The design uses a digitally controlled oscillator and a sigma delta modulator to adjust the frequency until it matches a reference signal, keeping the internal timing of the chip synchronized. This approach allows the oscillator to run freely while the system adjusts the feedback to lock the phase and frequency.
In the filing’s own words
An electronic device may be provided with phase-locked loop (PLL) circuitry that includes a digitally controlled oscillator (DCO), frequency divider, time-to-digital converter (TDC), loop filter, and sigma delta modulator (SDM). The DCO may generate an output clock signal. The frequency divider may generate a feedback clock signal based on the output clock signal and a division ratio. The SDM may control the division ratio. The PLL circuitry may lock while the DCO remains free running. To lock the PLL circuitry, the TDC and loop filter may measure a phase error of the feedback clock signal and a channel word provided to the SDM may be modified based on the measured phase error. This may adjust a channel frequency of the SDM until the channel frequency aligns with the frequency of the output clock signal and a phase of the feedback clock signal aligns with a reference clock phase.
What exactly they claim (claim 1)
1. Phase-locked loop (PLL) circuitry comprising: a time-to-digital converter (TDC), wherein a first input of the TDC is configured to receive a reference clock signal; a frequency divider, wherein an output of the frequency divider is communicatively coupled to a second input of the TDC; a sigma delta modulator (SDM), wherein a first output of the SDM is communicatively coupled to a first input of the frequency divider; and a loop filter communicatively coupled between an output of the TDC and an input of the SDM.
Facts
- Company
- Apple (Apple Inc.)
- Official title
- Digital Phase-Locked Loop Circuitry
- Publication number
- US20260269834A1
- Application number
- 19075430
- Filed
- Mar 10, 2025
- Published
- Sep 10, 2026
- Inventors
- 5
- Claims
- 20
Classified under
H03L 7/0992 Electricity & electronicsH03L 7/087 Electricity & electronicsH03L 7/093 Electricity & electronicsMore from Apple in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.