Samsung patents hardware design for faster data encryption
Samsung describes a specific circuit layout for encrypting data using a method called AES. The design splits the encryption process into distinct hardware blocks, such as a 'shiftrow' circuit and a 'mixcolumn' circuit, to handle different steps of the math simultaneously. A controller manages these parts to ensure the data is scrambled correctly before being output.
In the filing’s own words
An encryption device includes an encryption core circuit configured to generate output data by performing an encryption operation on input data, and an encryption controller circuit configured to control an operation of the encryption core. The encryption core circuit includes a shiftrow circuit configured to generate shift data by performing a shiftrow operation on the input data, a security circuit configured to generate permutation data by performing a permutation operation including a mixcolumn multiplication operation on the shift data, a mixcolumn addition circuit configured to generate first mid data by performing a mixcolumn addition operation on the permutation data, and a round key addition operation circuit configured to generate the output data by performing a round key addition operation on the first mid data.
What exactly they claim (claim 1)
1. An encryption device, comprising: an encryption core circuit configured to generate output data by performing an encryption operation on input data; and an encryption controller circuit configured to control an operation of the encryption core circuit, wherein the encryption core circuit comprises: a shiftrow circuit configured to generate shift data by performing a shiftrow operation on the input data; a security circuit configured to generate permutation data by performing a permutation operation including a mixcolumn multiplication operation on the shift data based on a plurality of encoding operations under control of the encryption controller circuit; a mixcolumn addition circuit configured to generate first mid data by performing a mixcolumn addition operation on the permutation data; a mixcolumn multiplication elimination circuit configured to generate second mid data by performing a mixcolumn multiplication elimination operation on the permutation data; and a round key addition operation circuit configured to generate the output data by performing a round key addition operation on the first mid data and the second mid data.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- Encryption device and operating method of encryption device
- Patent number
- US12750206B2
- Application number
- 18634211
- Filed
- Apr 12, 2024
- Granted
- Sep 29, 2026
- Inventors
- 4
- Claims
- 18
Classified under
H04L 9/0631 Electricity & electronicsG06F 21/60 Physics & computingG06F 21/602 Physics & computingH04L 9/06 Electricity & electronicsH04L 9/08 Electricity & electronicsMore from Samsung in Security & privacy
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.