Apple patents display circuit that adjusts voltage to cut power use
This patent describes a power management chip for screens that fine-tunes voltage levels to reduce energy consumption. It works by detecting unwanted electrical noise from the display panel and adjusting the reference voltages used to drive the screen. A dedicated timing controller also helps narrow the frequency range of certain voltages to minimize visual artifacts on the front of the screen.
In the filing’s own words
A power management integrated circuit (PMIC) of an electronic display may include image data reference voltage adjustment circuitry, a negative supply voltage generator that may generate a negative supply voltage with multiple negative supply voltages, and/or a dedicated timing controller. The image data reference voltage adjustment circuitry may tune image data reference voltages for generating programming voltages based on receiving an indication of an undesired direct current (DC) voltage offset, an undesired alternating current (AC) noise, or both. The image data reference voltage adjustment circuitry may receive the indication from a display panel of the electronic display. The negative supply voltage generator may elevate a voltage of the negative supply voltage to reduce a power consumption of the electronic display. The dedicated timing controller may improve (e.g., reduce length of) a frequency range of one or more switched voltages of the PMIC to reduce front of screen artifacts.
What exactly they claim (claim 1)
1. An electronic device comprising: a display panel; a power management integrated circuit coupled to the display panel, the power management integrated circuit configured to: output a positive supply voltage to the display panel; receive an indication of an undesired direct current (DC) voltage offset, an undesired alternating current (AC) noise, or both from the display panel in response to the positive supply voltage; and output an adjusted low voltage and an adjusted high voltage adjusted based on the undesired DC voltage offset, the undesired AC noise, or both; and a data driver coupled to the display panel and the power management integrated circuit, wherein the data driver is configured to: generate a programming voltage based on image data, the adjusted low voltage, and the adjusted high voltage; and output the programming voltage to the display panel.
Facts
- Company
- Apple (Apple Inc.)
- Official title
- Reduced power display power management integrated circuit
- Patent number
- US12731524B2
- Application number
- 18815162
- Filed
- Aug 26, 2024
- Granted
- Sep 8, 2026
- Inventors
- 6
- Claims
- 20
Classified under
G09G 3/2096 Physics & computingG09G 3/2007 Physics & computingG09G 2310/027 Physics & computingG09G 2330/021 Physics & computingG09G 2330/028 Physics & computingMore from Apple in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.